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AD7761 Arkusz danych(PDF) 5 Page - Analog Devices

Numer części AD7761
Szczegółowy opis  8-Channel, 16-Bit, Simultaneous Sampling ADC with Power Scaling, 110.8 kHz BW
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Strona internetowa  http://www.analog.com
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AD7761 Arkusz danych(HTML) 5 Page - Analog Devices

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AD7761
Data Sheet
Rev. A | Page 4 of 75
GENERAL DESCRIPTION
The AD7761 is an 8-channel, simultaneous sampling sigma-delta
(Σ-Δ) analog-to-digital converter (ADC) with a Σ-Δ modulator
and digital filter per channel, enabling synchronized sampling of ac
and dc signals.
The AD7761 achieves 97.7 dB dynamic range at a maximum
input bandwidth of 110.8 kHz, combined with typical performance
of ±1 LSB integral nonlinearity (INL), ±1 LSB offset error, and
±5 LSB gain error.
The AD7761 user can trade off input bandwidth, output data rate,
and power dissipation. Select one of three power modes to optimize
the device for noise targets and power consumption. The
flexibility of the AD7761 allows it to become a reusable platform
for low power dc and high performance ac measurement
modules.
The AD7761 has three modes: fast mode (256 kSPS maximum,
110.8 kHz input bandwidth, 51.5 mW per channel), median
mode (128 kSPS maximum, 55.4 kHz input bandwidth, 27.5 mW
per channel) and low power mode (32 kSPS maximum, 13.8 kHz
input bandwidth, 9.375 mW per channel).
The AD7761 offers extensive digital filtering capabilities, such as
a wideband, low ±0.005 dB pass-band ripple, antialiasing low-
pass filter with sharp roll-off, and 105 dB attenuation at the
Nyquist frequency.
Frequency domain measurements can use the wideband linear
phase filter. This filter has a flat pass band (±0.005 dB ripple)
from dc to 102.4 kHz at 256 kSPS, from dc to 51.2 kHz at
128 kSPS, or from dc to 12.8 kHz at 32 kSPS.
The AD7761 also offers sinc response via a sinc5 filter, a low
latency path for low bandwidth, and low noise measurements.
The wideband and sinc5 filters can be selected and run on a per
channel basis.
Within these filter options, the user can improve the dynamic
range by selecting from decimation rates of ×32, ×64, ×128,
×256, ×512, and ×1024. The ability to vary the decimation
filtering optimizes noise performance to the required input
bandwidth.
Embedded analog functionality on each ADC channel makes
design easier, such as a precharge buffer on each analog input
that reduces analog input current and a precharge reference
buffer per channel reduces input current and glitches on the
reference input terminals.
The device operates with a 5 V AVDD1A and AVDD1B supply,
a 2.25 V to 5.0 V AVDD2A and AVDD2B supply, and a 2.5 V to
3.3 V or 1.8 V IOVDD supply (see the 1.8 V IOVDD Operation
section for specific requirements for operating at 1.8 V IOVDD).
The device requires an external reference; the absolute input
reference voltage range is 1 V to AVDD1 − AVSS.
For the purposes of clarity within this data sheet, the AVDD1A
and AVDD1B supplies are referred to as AVDD1 and the AVDD2A
and AVDD2B supplies are referred to as AVDD2. For the
negative supplies, AVSS refers to the AVSS1A, AVSS1B,
AVSS2A, AVSS2B, and AVSS pins.
The specified operating temperature range is −40°C to +105°C.
The device is housed in a 10 mm × 10 mm 64-lead LQFP package
with a 12 mm × 12 mm printed circuit board (PCB) footprint.
Throughout this data sheet, multifunction pins, such as
XTAL2/MCLK, are referred to either by the entire pin name or
by a single function of the pin, for example MCLK, when only
that function is relevant.


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