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AD9633BCPZRL7-80 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części AD9633BCPZRL7-80
Szczegółowy opis  125 MSPS, Serial LVDS 1.8 V ADC
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9633BCPZRL7-80 Arkusz danych(HTML) 4 Page - Analog Devices

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Data Sheet
AD9633
Rev. B | Page 3 of 41
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1.
Parameter1
Temp
AD9633-80
AD9633-105
AD9633-125
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
RESOLUTION
12
12
12
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Guaranteed
Guaranteed
Offset Error
Full
0.7
0.3
+0.1
0.7
0.3
+0.1
0.7
0.3
+0.1
% FSR
Offset Matching
Full
0.6
+0.2
+0.6
0.6
+0.2
+0.6
0.6
+0.2
+0.6
% FSR
Gain Error
Full
10
5
0
10
5
0
10
5
0
% FSR
Gain Matching
Full
1
1.5
1
1.8
1
1.5
% FSR
Differential Nonlinearity (DNL)
Full
0.6
+0.6
0.6
+0.6
0.6
+0.6
LSB
25°C
±0.3
±0.3
±0.3
LSB
Integral Nonlinearity (INL)
Full
1.4
+1.6
1.4
+1.6
1.4
+1.6
LSB
25°C
±0.5
±0.5
±0.5
LSB
TEMPERATURE DRIFT
Offset Error
Full
±2
±2
±2
ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Full
0.98
1.0
1.02
0.98
1.0
1.02
0.98
1.0
1.02
V
Load Regulation at 1.0 mA (VREF = 1 V)
Full
2
2
2
mV
Input Resistance
Full
7.5
7.5
7.5
kΩ
INPUT-REFERRED NOISE
VREF = 1.0 V
25°C
0.25
0.25
0.25
LSB rms
ANALOG INPUTS
Differential Input Voltage (VREF = 1 V)
Full
2
2
2
V p-p
Common-Mode Voltage
Full
0.9
0.9
0.9
V
Differential Input Resistance
5.2
5.2
5.2
kΩ
Differential Input Capacitance
Full
3.5
3.5
3.5
pF
POWER SUPPLY
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
IAVDD2
Full
125
136
151
166
173
191
mA
IDRVDD (ANSI-644 Mode)2
Full
59
80
63
97
66
101
mA
IDRVDD (Reduced Range Mode)2
25°C
40
43
46
mA
TOTAL POWER CONSUMPTION
DC Input
Full
313
360
400
mW
Sine Wave Input (Four Channels Including
Output Drivers ANSI-644 Mode)
Full
331
389
385
473
430
526
mW
Sine Wave Input (Four Channels Including
Output Drivers Reduced Range Mode)
25°C
297
349
394
mW
Power-Down
Full
2
2
2
mW
Standby3
Full
174
202
226
mW
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
2
Measured with a low input frequency, full-scale sine wave on all four channels.
3
Can be controlled via the SPI.


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