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AD9635BCPZ-80 Arkusz danych(PDF) 3 Page - Analog Devices

Numer części AD9635BCPZ-80
Szczegółowy opis  1.8 V Analog-to-Digital Converter
Download  37 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9635BCPZ-80 Arkusz danych(HTML) 3 Page - Analog Devices

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AD9635
Data Sheet
Rev. B | Page 2 of 36
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
DC Specifications ......................................................................... 3
AC Specifications.......................................................................... 4
Digital Specifications ................................................................... 5
Switching Specifications .............................................................. 6
Timing Specifications .................................................................. 6
Absolute Maximum Ratings.......................................................... 10
Thermal Resistance .................................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Descriptions........................... 11
Typical Performance Characteristics ........................................... 12
AD9635-80................................................................................... 12
AD9635-125................................................................................. 15
Equivalent Circuits......................................................................... 18
Theory of Operation ...................................................................... 19
Analog Input Considerations.................................................... 19
Voltage Reference ....................................................................... 20
Clock Input Considerations...................................................... 21
Power Dissipation and Power-Down Mode ........................... 22
Digital Outputs and Timing ..................................................... 23
Output Test Modes..................................................................... 26
Serial Port Interface (SPI).............................................................. 27
Configuration Using the SPI..................................................... 27
Hardware Interface..................................................................... 28
Configuration Without the SPI ................................................ 28
SPI Accessible Features.............................................................. 28
Memory Map .................................................................................. 29
Reading the Memory Map Register Table............................... 29
Memory Map Register Table..................................................... 30
Memory Map Register Descriptions........................................ 33
Applications Information .............................................................. 35
Design Guidelines ...................................................................... 35
Power and Ground Guidelines ................................................. 35
Clock Stability Considerations ................................................. 35
Exposed Pad Thermal Heat Slug Recommendations............ 35
VCM............................................................................................. 35
Reference Decoupling................................................................ 35
SPI Port........................................................................................ 35
Outline Dimensions....................................................................... 36
Ordering Guide .......................................................................... 36
REVISION HISTORY
10/15—Rev. A to Rev. B
Changed tSAMPLE/16 to tSAMPLE/12, AD9516 to AD9516-0/
AD9516-1/AD9516-2/AD9516-3/AD9516-4/AD9516-5,
and AD9517 to AD9517-0/AD9517-1/AD9517-2/AD9517-3/
AD9517-4 ....................................................................... Throughout
Changes to General Description Section ...................................... 1
Added Endnote 4, Table 4 ............................................................... 6
Changes to Digital Outputs and Timing Section ....................... 25
8/14—Rev. 0 to Rev. A
Added Propagation Delay Parameters of 1.5 ns (min)
and 3.1 ns (max), Table 4................................................................. 6
Changes to Figure 2 and Figure 3................................................... 7
Changes to Figure 4 and Figure 5................................................... 8
Changes to Pin 21 Description..................................................... 11
Changes to Voltage Reference Section......................................... 20
Changes to Table 11 ....................................................................... 25
Changes to First Paragraph of Serial Port Interface (SPI)
Section.............................................................................................. 27
Changes to SPI Accessible Features Section ............................... 28
Changes to Output Phase (Register 0x16) Bits[6:4]—Input
Clock Phase Adjust Section........................................................... 33
Changes to Resolution/Sample Rate Override (Register 0x100)
Section and User I/O Control 3 (Register 0x102) Bit 3—VCM
Power-Down Section ..................................................................... 34
Added Clock Stability Considerations Section........................... 35
6/12—Revision 0: Initial Version


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