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ADAU1961WBCPZ-R7 Arkusz danych(PDF) 1 Page - Analog Devices |
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ADAU1961WBCPZ-R7 Arkusz danych(HTML) 1 Page - Analog Devices |
1 / 77 page Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL Data Sheet ADAU1961 Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2010–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES 24-bit stereo audio ADC and DAC: >98 dB SNR Sampling rates from 8 kHz to 96 kHz Low power: 17 mW record, 18 mW playback, 48 kHz 6 analog input pins, configurable for single-ended or differential inputs Flexible analog input/output mixers Stereo digital microphone input Analog outputs: 2 differential stereo, 2 single-ended stereo, 1 mono headphone output driver PLL supporting input clocks from 8 MHz to 27 MHz Analog automatic level control (ALC) Microphone bias reference voltage Analog and digital I/O: 3.3 V I2C and SPI control interfaces Digital audio serial data I/O: stereo and time-division multiplexing (TDM) modes Software-controllable clickless mute 32-lead, 5 mm × 5 mm LFCSP −40°C to +105°C operating temperature range Qualified for automotive applications APPLICATIONS Automotive head units Automotive amplifiers Navigation systems Rear-seat entertainment systems GENERAL DESCRIPTION The ADAU1961 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 35 mW from a 3.3 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1961 includes a stereo digital microphone input. The ADAU1961 includes five high power output drivers (two differential and three single-ended), supporting stereo head- phones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio. The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz. FUNCTIONAL BLOCK DIAGRAM HP JACK DETECTION REGULATOR INPUT MIXERS ALC MICROPHONE BIAS PLL LINN LINP LAUX JACKDET/MICIN RINP RINN RAUX MICBIAS LHP LOUTN LOUTP ADAU1961 RHP MONOOUT ROUTP ROUTN OUTPUT MIXERS DAC DIGITAL FILTERS ADC DIGITAL FILTERS DAC DAC ADC ADC SDA/ COUT I2C/SPI CONTROL PORT SERIAL DATA INPUT/OUTPUT PORTS MCLK ADC_SDATA SCL/ CCLK ADDR1/ CDATA ADDR0/ CLATCH DAC_SDATA Figure 1. |
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