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MT9V023 Arkusz danych(PDF) 10 Page - ON Semiconductor |
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MT9V023 Arkusz danych(HTML) 10 Page - ON Semiconductor |
10 / 43 page MT9V023 www.onsemi.com 10 Table 4. FRAME TIME (continued) Parameters Default Timing at 26.66 MHz Equation Name Nrows x (A + Q) Frame valid time Context A: (R0x03) × (A + Q) Context B: (R0xCB) x (A + Q) 406,080 pixel clocks = 406,080 master = 15.23 ms F Total frame time V + (Nrows x (A + Q)) 444,154 pixel clocks = 444,154 master = 16.66 ms Sensor timing is shown above in terms of pixel clock and master clock cycles (refer to Figure 7). The recommended master clock frequency is 26.66 MHz. The vertical blanking and the total frame time equations assume that the integration time (Coarse Shutter Width plus Fine Shutter Width) is less than the number of active rows plus the blanking rows minus the overhead rows: Window Height ) Vertical Blanking * 2 (eq.1) If this is not the case, the number of integration rows must be used instead to determine the frame time, as shown in Table 5. In this example it is assumed that the Coarse Shutter Width Control is programmed with 523 rows, and the Fine Shutter Width Total is zero. For Simultaneous mode, if the exposure time registers (Coarse Shutter Width Total plus Fine Shutter Width Total) exceed the total readout time, then the vertical blanking time is internally extended automatically to adjust for the additional integration time required. This extended value is not written back to the vertical blanking registers. The Vertical Blank register can be used to adjust frame-to-frame readout time. This register does not affect the exposure time but it may extend the readout time. Table 5. FRAME TIME−LONG INTEGRATION TIME Parameter Name Equation (Number of Master Clock Cycles) Default Timing at 26.66 MHz V’ Vertical blanking (long integration time) Context A: (R0x0B + 2 − R0x03) y (A + Q) + R0xD5 + 4 Context B: (R0xD2 + 2 − R0xCB) x (A + Q) + R0xD8 + 4 38,074 pixel clocks = 38,074 master = 1.43 ms F’ Total frame time (long integration time) Context A: (R0x0B + 2) y (A + Q) + R0xD5 +4 Context B: (R0xD2 + 2) x (A + Q) + R0xD8 +4 444,154 pixel clocks = 444,154 master = 16.66 ms 1. The MT9V023 uses column parallel analog−digital converters, thus short row timing is not possible. The minimum total row time is 690 columns (horizontal width + horizontal blanking). The minimum horizontal blanking is 61. When the window width is set below 627, horizontal blanking must be increased. |
Podobny numer części - MT9V023_17 |
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Podobny opis - MT9V023_17 |
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