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AD7734BRU Arkusz danych(PDF) 11 Page - Analog Devices

Numer części AD7734BRU
Szczegółowy opis  4-Channel 10 V Input Range, High Throughput, 24-Bit Sigma-Delta ADC
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

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AD7734
Data Sheet
Rev. B | Page 10 of 32
OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7734 can be operated with chopping enabled or disabled,
allowing the ADC to be programmed either to optimize the
throughput rate and channel switching time or to optimize the
offset drift performance. Noise tables for these two primary
modes of operation are outlined below for a selection of output
rates and settling times.
The AD7734 noise performance depends on the selected chopping
mode, the filter word (FW) value, and the selected analog input
range. The AD7734 noise will not vary significantly with MCLK
frequency.
CHOPPING ENABLED
The first mode, in which the AD7734 is configured with chopping
enabled (CHOP = 1), provides very low noise with lower output
rates. Table 4 to Table 6 show the –3 dB frequencies and typical
performance versus the channel conversion time and equivalent
output data rate, respectively.
Table 4 shows the typical output rms noise. Table 5 shows the
typical effective resolution based on rms noise. Table 6 shows
the typical output peak-to-peak resolution, representing values
for which there will be no code flicker within a 6 Σ limit. The
peak-to-peak resolutions are not calculated based on rms noise
but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
Table 4. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Enabled
FW
Conversion Time Register
Conversion Time (µs)
Output Data Rate (Hz)
–3 dB Frequency (Hz)
RMS Noise (µV)
127
FFh
2686
372
200
9.6
46
AEh
999
1001
520
15.5
22
96h
499
2005
1040
22.7
17
91h
395
2534
1300
26.1
8
88h
207
4826
2500
39.2
6
86h
166
6041
3100
46.0
2
82h
82
12166
6300
120.0
Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
FW
Conversion
Time Register
Conversion Time
(µs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
Input Range/Effective Resolution (Bits)
±10 V
0 V to +10 V
±5 V
0 V to +5 V
127
FFh
2686
372
200
21.0
20.0
20.0
19.0
46
AEh
999
1001
520
20.3
19.3
19.3
18.3
22
96h
499
2005
1040
19.7
18.7
18.7
17.7
17
91h
395
2534
1300
19.5
18.5
18.5
17.5
8
88h
207
4826
2500
19.0
18.0
18.0
17.0
6
86h
166
6041
3100
18.7
17.7
17.7
16.7
2
82h
82
12166
6300
17.3
16.3
16.3
15.3
Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
FW
Conversion Time
Register
Conversion Time
(µs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
Input Range/Peak-to-Peak Resolution (Bits)
±10 V
0 V to +10 V ±5 V
0 V to +5 V
127
FFh
2686
372
200
18.1
17.1
17.1
16.1
46
AEh
999
1001
520
17.4
16.4
16.4
15.4
22
96h
499
2005
1040
16.9
15.9
15.9
14.9
17
91h
395
2534
1300
16.7
15.7
15.7
14.7
8
88h
207
4826
2500
16.2
15.2
15.2
14.2
6
86h
166
6041
3100
15.8
14.8
14.8
13.8
2
82h
82
12166
6300
15.0
13.4
13.4
12.4


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